Since our largest emphasis has been on microlithography, here we provide a longer description of this work. Further information on these topics will be added here as these web pages continue to grow.

Research Work in Microlithography

     Our own work has largely focused on three aspects. The first involves improvements in the underlying physical models used in microlithography simulation, such as advances beyond the Kirchhoff boundary condition in optical diffraction theory, as well as a deeper understanding into the chemistry and physical behavior of photoresist materials. Such work guides basic understanding both in the optics and photoresist areas. At the other extreme, phenomenological models have been advanced to enable simulation results on large scales to be placed in the hands of device and circuit designers. Finally, optimization of the large number of allowable parameters is a pervasive problem that has received much attention and interest by the engineering community. Our work here has enabled simulation tools in microlithography to optimize on designs and proximity corrections to significantly improve printability of microchip circuitry and device designs.

Overview of Microlithography and Simulation Methods

     Microlithography is the term often used in the semiconductor microchip industry when referring to the use of lithographic means to mass produce microelectronic chips. The basic technique roughly consists of exposing a thin film of a special type of material, called photoresist, to radiation or an electron beam, whereby the incident energy contains the spatial information necessary to pattern semiconductor device and circuit components. The photoresist has the special property that it will be chemically altered by the incident energy. A subsequent dissolution process then removes either the exposed or the unexposed film sections, depending on the type of photoresist material used. The final result is a complex pattern left in the film that closely matches the desired shapes of the semiconductor device and circuit element components that are to be fabricated. This patterned set of shapes in the film then serves as a mask for subsequent steps, such as ion implantation, etching, and deposition of other materials.

     Microlithography is widely recognized as one of the most, if not the most, critical gating factors for enabling miniature semiconductor device structures to be manufactured on a truly massive scale. To emphasize this point, years before submicron structures could be manufactured in large quantities, technologists were able to create submicron semiconductor devices on a small scale basis, such as by patterning directly into photoresist with a scanning electron beam. However, mass producing such devices and making them available on a real commercial basis required far faster methods than "writing" the patterns of each device individually. Consequently, optical microlithography has been, and continues to be, the main workhorse for producing these small devices in large quantities, as this method involves the simultaneous illumination of massive number of device patterns. At some point in the future, other microlithography techniques than "optical" ones will need to be utilized. The question of when optical microlithography will no longer be adequate has been the subject of intense study and debate for many years now.

     Simulation methods are an important component of microlithography development for a number of reasons. First, the equipment involved in microlithography is extremely expensive, thereby necessitating the need for careful planning when moving to the next generation of lithographic tools. For example, $5M to $10M for each exposure projection tool in a manufacturing line is not uncommon; likewise, having 20 such tools or more in a single leading-edge facility is not uncommon. These costs do not include the other critical costs of reticle making and photoresist processing. The entire tool set involved in lithographic processing is roughly limited in its ability to print smaller than a particular feature size. To produce printed dimensions smaller than this amount, when advancing to the next smaller device generation, requires either a major or a complete overhaul of this tooling equipment. Such an investment by even the largest semiconductor manufacturers is quite daunting, and requires careful planning and checks to insure that the investment will enable the desired goal to be reached. Simulation is one of the key tools used for making these checks, particularly prior to the availability of such equipment. Manufacturers of semiconductor chips need to predict future lithographic capabilities as accurately as possible, as this information influences all the other process changes (ion implantation, oxidation, diffusion, etching, deposition, etc.) that will jointly need to be made. In a similar vein, equipment manufacturers of the next generation lithographic tools need to carefully guide and direct the design of these improved tools to fit the semiconductor manufacturer's future needs; simulation aids enormously here as well.

     Second, even when a new semiconductor device generation is not being contemplated, but simple "shrinks" on present devices are being made, without major changes in the device design, then simulation is essential for determining the best way of pushing the present set of tooling to it's maximum limits. For example, a number of optical enhancement "tricks" have been discovered during the past decade that can significantly improve the capability of available equipment. Part of this innovation has been born of necessity, as the development of a fully new generation of tooling at a new illumination wavelength or a completely new source of radiation, such as extreme ultraviolet (EUV) or X-ray, is an enormously expensive task.

     Thus, simulation is helpful for long term planning, when moving to an entirely new set of tooling, as well as for optimizing and pushing present microlithographic tooling to its most aggressive limits.