Ajay Joshi
Collaborative Research: ASCENT: Heterogeneously Integrated Electronic Photonic AI Accelerators (HIEPAA)
Nontechnical Description The rapid advancement of deep neural networks (DNNs) and large language models (LLMs) is transforming many facets of modern society. These AI models are trained and deployed in data centers powered by specialized hardware such as graphics processing units (GPUs), resulting in significant energy demands and raising critical concerns around sustainability and energy […]
Privacy-Preserving Cloud Computing using Homomorphic Encryption
In today’s data-driven world, a large amount of data is collected by billions of devices (cell phones, autonomous cars, handheld game consoles, etc.), and this data is then processed in the cloud. A common approach to maintain data privacy in the cloud is to keep the data in encrypted form, and we decrypt the data […]
Electro-Photonic Computing (EPiC) for On-Premise Applications
Researchers from Boston University College of Engineering, the Harvard John A. Paulson School of Engineering and Applied Sciences, and photonic-computing developer Lightmatter are collaborating to develop an Electro-Photonic Computing (EPiC) solution for Autonomous Vehicles (AVs), solving one of the biggest hurdles AVs face today – delivering high performance, low latency computing power that is also […]
SHF: Small: Architecting the COSMOS:A Combined System of Optical Phase Change Memory and Optical Links
Today’s data-intensive applications that use graph processing, machine learning or privacy-preserving paradigms demand memory sizes on the order of hundreds of GigaBytes and bandwidths on the order of TeraBytes per second. To support the ever-growing memory needs of the applications, Dynamic Random Access Memory (DRAM) systems have evolved over the decades. However, DRAM will not […]
SHF: Small: Architecting the COSMOS: A Combined System of Optical Phase Change Memory and Optical Links
Today’s data-intensive applications that use graph processing, machine learning or privacy-preserving paradigms demand memory sizes on the order of hundreds of GigaBytes and bandwidths on the order of TeraBytes per second. To support the ever-growing memory needs of the applications, Dynamic Random Access Memory (DRAM) systems have evolved over the decades. However, DRAM will not […]
BlackParrot – An Open-Source RISC-V Multicore Processor
The goal of this project is to design and open-source a Linux-capable, cache-coherent, RV64GC multicore processor. This processor is currently being developed by the University of Washington and Boston University, but it strives to be community-driven and infrastructure agnostic core, which is Pareto optimal in terms of power, performance, area and complexity. BlackParrot is ideal […]
SaTC: CORE: Medium: Collaborative: Taming Memory Corruption with Security Monitors
Modern computing systems are under constant attack by organized crime syndicates, nation-state adversaries, and regular cyber-criminals alike. Among the most damaging attacks are those that exploit so-called memory corruption vulnerabilities which often confer the attacker with access to sensitive information or allow the attacker to execute arbitrary code on the victim’s machine. To counter the […]
SHF: Small: Reclaiming Dark Silicon via 2.5D Integrated Systems with Silicon Photonic Networks
Emerging applications in the growing domains of cloud, internet-of-things, and high-performance computing require higher levels of parallelism and much larger data transfers compared to applications of the past. In tandem, power and thermal constraints limit the number of transistors that can be used simultaneously on a chip and this limit has led to the ?Dark […]
EAGER: Design and Exploration of Optical Nanoantenna Technology for Advanced IC Testing and Hardware Security
Non-technical: Today’s integrated circuit (IC) chips are used in practically all consumer electronics, as well as in critical defense technologies and municipal support systems such as power and water supply services. To build these chips, state-of-the-art technologies are used that integrate billions of transistors on a single chip. Currently, we do not have the technological […]
CNS:CSR Collaborative Research: Leveraging Intra-chip/Inter-chip Silicon-Photonic Networks for Designing Next-Generation Accelerators
A little over a decade ago, GPUs were fixed-function processors built around a pipeline, dedicated to rendering 3-D graphics. In the past decade, as the potential for GPUs to provide massive compute parallelism became apparent, the software community developed new programming environments (CUDA and OpenCL) to leverage these massively parallel devices. Today, the leading graphics […]