Nvidia co-sponsors two students for PASI
Two graduate students who have recently been awarded an Nvidia fellowship will be co-sponsored by the company to attend PASI. They are Henry Cook, from University of California Berkeley, and Albert Sidelnik, from University of Illinois at Urbana-Champaign.
Each of them will receive a 50% travel grant from Professor Barba’s NSF award, and an additional $1000 from Nvidia towards their airfare. Both students will contribute to PASI by making a presentation about their research and the activities going on at their labs. Here is a brief introduction to the two first student participants that we can today announce:
PhD student, Dept. Computer Science, University of California Berkeley (advisors: David Patterson and Krste Asanovic)
Henry has a BSc in computer science (2007) from University of Virginia, where he worked under Prof. Kevin Skadron, and an MSc from UC Berkely (2009). He lists as his main research interests: manycore chip architectures, software-managed memory hierarchies, composable abstractions of data locality, design space search and optimization.
Currently, Henry is focusing on creating “programmable” software-managed memory hierarchies, including mechanisms that allow for software control of data placement, movement, coherence and partition-able capacity. He’s also studying auto-tuning libraries and frameworks that can take a high-level description of the computation and emit software control instructions (e.g. Sequuoia). Such frameworks meed knowledge of the structure of computations from domain experts, thus Henri will use his PASI experience to familiarize himself with a wider array of HPC applications.
Henry did an internship at Nvidia Research this summer and is a 2010 recipient of the Nvidia Fellowship. He is co-author of four CS conference papers, including the 2010 International Symposium on Computer Architecture, and the ACM/IEEE Conference on Design Automation.
PhD student, Dept. Computer Science, University of Illinois Urbana-Champaign (advisors: David Padua and Maria Garzaran)
Albert has a BSc in computer science (2001) from Rutgers University, and MA in the same field from Boston University (2005). His main interests are developing programming models and optimization techniques for large-scale and many-core parallel systems. He is currently developing compiler optimizations and analytical models for high-level GPU programming. His focus is in language extensions and compiler techniques for translation of programs from array languages (e.g. Chapel) to efficient GPU code.
Albert has done internships at Cray and IBM and has a few years of experience as a software engineer, working in IBM’s BlueGene. He has 5 published US patents on architecture, and is a 2010 recipient of the Nvidia Fellowship.