ECE PhD Thesis Defense: Ze Niu

ECE PhD Thesis Defense: Ze Niu

Title: Three-Dimensional Monte Carlo Modeling of Silicon Field Emitters and GaN/AIGaN HFETS

Presenter: Ze Niu

Advisor: Professor Enrico Bellotti

Chair: TBD

Committee: Professor Enrico Bellotti, Professor Alexander Sergienko, Professor Roberto Paiella, Professor Sahar Sharifzadeh

Google Scholar Link: https://scholar.google.com/citations?user=y_1XRdkAAAAJ&hl=en

Abstract: Semiclassical Monte Carlo simulation of carrier transport in silicon and III-nitride semiconductors is developed and applied to two technologically distinct device classes: silicon field emitter arrays (FEAs) and GaN/AlGaN heterojunction field-effect transistors (HFETs). The three-dimensional particle-based framework couples Kane non-parabolic analytical band structures fitted to density functional theory (DFT) data with a comprehensive phonon and impurity scattering library, and extends into the vacuum domain via a semi-quantum tunneling model at semiconductor–vacuum interfaces.

For silicon FEAs, the Morgulis–Stratton barrier combined with the Kemble tunneling formalism is shown to best reproduce experimental Fowler–Nordheim emission characteristics; array-level simulations further reveal that screening is governed primarily by nearest-neighbor interactions, with sharper apex geometries reducing inter-tip screening and improving emission uniformity. Finally, array scaling behavior is characterized and benchmarked against published experimental data.

For GaN/AlGaN HFETs, band parameters and phonon scattering rates are derived from DFT, establishing a parameter set to describe the carrier transport with minimal empirical fitting; spontaneous and piezoelectric polarization effects are accounted for as fixed interfacial sheet charges at abrupt junctions and as a volumetric polarization charge density in the graded channel region, reproducing the two-dimensional electron gas (2DEG) that forms the transistor channel. The resulting simulator is applied to three HEMT configurations - metal-polar, N-polar, and graded-channel - whose simulated I-V characteristics reveal how polarization engineering and channel grading affect on-resistance and saturation current

Collectively, these investigations establish a self-consistent simulation methodology that captures non-equilibrium carrier dynamics across both semiconductor bulk and vacuum regions, providing a predictive design tool for next-generation vacuum nanoelectronic devices and wide-bandgap transistors.

When 10:00 am - 11:30 am on 10 June 2026
Building PHO 339