ECE MS Thesis Defense: Jeffery Lim

ECE MS Thesis Defense: Jeffery Lim

Title: VNS: Toward an Open-Source FPGA-Based SmartNIC Platform for Cloud Infrastructure Research

Presenter: Jeffery Lim

Advisor: Professor Martin Herbordt

Committee: Professor Osama Alshaykh, Professor Richard West, Professor Gianluca Stringhini

Abstract: Modern cloud providers rely on proprietary SmartNIC architectures, such as Amazon's Nitro system, to offload networking, storage, and security functions from the host CPU. By bypassing the hypervisor data path, these designs maximize CPU availability for tenant workloads. Because these designs are proprietary, the research community cannot independently study, reproduce, or extend them. No open-source equivalent exists that combines SR-IOV-aware networking, programmable network function offloading, and multi-tenant isolation in a unified platform.

This thesis presents the design, implementation, and evaluation of the Verilog Network Switch (VNS), an open-source FPGA-based network switch built on an existing open-source SR-IOV-capable NIC. The switch contributes two components: a hardware switching fabric to enable intra-host packet forwarding, and a re-architected many-core eBPF engine to enable per-tenant network functions to execute directly in the data path. 

We compare VNS with Open vSwitch and a dedicated hardware switch on CloudLab FPGA hardware. VNS delivers 2.2x the throughput of Open vSwitch, stays within 10% of the throughput of the hardware switch, and achieves 4x lower tail latency under key-value store workloads. Overall, VNS performance is similar or better than existing alternatives while representing the first open-source steps toward a Nitro-class SmartNIC research platform.

When 2:00 pm - 4:00 pm on 17 April 2026
Building PHO 428