VLSI and Neural Net Systems (VNNS) Laboratory

Acoustic Direction Finding (ADF)

A Pitch and Bearing Auditory Feature Extractor Implemented in an FPGA, Tyler Gore 2003

We developed a chip to extract pitch and bearing information from artificial spike trains produced by an electronic chip that simulates spike events in the mammalian auditory nerve. We used an AER protocol to serially feed spiking events into our chip, at up to 128Ks/s, which are then processed in parallel. The extracted pitch and bearing events are then fed to a computer for display and analysis. The resulting pitch and bearing information is used for sound-source characterization and localization.

To implement the design and preserve flexibility, a Field Programmable Gate Array was used. By using the FPGA approach, design work and simulation could be done in a hardware description language, Verilog. After verification, the actual circuit can be quickly implemented in hardware. Our design was done concurrently with an electronic cochlea and auditory nerve chip also developed at Boston University.

Our design supports 192 pairs of spike-train sources. Each pair is made up of a left and right channel that have matched frequency ranges, which link back to matching channels of a left and a right cochlea. They are also matched according to threshold triggering levels, corresponding to three auditory-nerve populations. Pitch information for a frequency range is extracted by measuring the relative time between spike events on an individual channel. Bearing information is extracted by measuring the relative time between two frequency and population-matched, left and right channels. Due to the wide range of frequencies that we need to process, special processing parameters are used over various frequency bands to more effectively extract the events. Pitch and bearing events are measured to within one microsecond accuracy.

We rigorously tested the hardware. We developed a program to run on a PC that used a digital I/O card that simulated the output of the auditory nerve chip. Another digital I/O card collected the auditory feature events that our chip extracted. A physiologically based model developed at the Boston University Hearing Research Center was used to produce realistic auditory-nerve inputs for our chip. The output of our chip closely matched the results of the physiologically-based model which also computes pitch and bearing.


VLSI Auditory Processing, Marianne Nourzad, Tyler Gore, 2004

We are developing a chip to extract pitch and bearing information as part of a system for sound-source characterization and localization. A similar Field Programmable Gate Array implementation has been built and is no migrated to an asynchronous design approach mainly motivated through cost, flexibility in system integration and power consumption. The chip extracts the information from spike trains produced by an analog chip that simulates spike events in the mammalian auditory nerve. Two asynchronous interfaces accept an incoming AER protocols. The incoming information is buffered and routed to the corresponding individual computing blocks. A main bus handles the communication between incoming and outgoing data. The system architecture is kept modular for future system flexibility. The extracted pitch and bearing events are then fed to a computer for display and analysis.

Our design supports 192 pairs made up of a left and right channel with matched frequency ranges, which link back to matching channels of a left and a right cochlea that acts as a filter bank. Pitch information for a frequency range is extracted by measuring the relative time between spike events on an individual channel. Bearing information is extracted by measuring the relative time between two frequency and population-matched, left and right channels. Due to the wide range of frequencies that need to be processed, special parameters are used over various frequency bands to improve performance.

In order to thoroughly test the hardware, we developed a program that uses digital I/O cards to communicate with our chip. A physiologically based model developed at the Boston University Hearing Research Center was used to produce realistic auditory-nerve inputs for our chip. The output of our chip closely matched the results of the physiologically-based model, which also computes pitch and bearing.

Last Modified: Sunday October 21, 2007