Cadence University Program

Boston University Department of Electrical and Computer Engineering (ECE) is a Member of the Cadence University Program, as part of this University Program ECE provide its student with access to a suite of Cadence products.

Some of the courses and research groups that utilize Cadence for their curriculums are listed below:

Additionally, Cadence products are also heavily utilized by student working on MS Project, MS Thesis as well as Visiting Researcher.

The three most utilized Cadence products suite within our department are

  • Custom Integrated Circuits
  • Verification
  • Silicon-Package-Board

Custom Integrated Circuits Products are utilized by some courses to do design and simulation of RF and analog integrated circuits including doing the layout of the circuit, passing DRC (design rule check), passing LVS (layout versus schematic), passing QRC (parasitic extraction), extracting models based on the layout, and simulating with the layout-based models. S/W used includes Virtuoso, Assura, SpectraRF, and MonteCarlo.

Other Courses concentrate on utilizing an specific product within the Custom Integrated Circuits suite of products like Virtuoso Design Environment to teach students about how to draw circuit schematics, how to simulate the circuit, how to draw the physical layout, run LVS, run DRC, use extraction tools and simulate the extracted netlist.

The Verification suite are heavily used for Verification of layout versus schematic using Virtuoso while the Silicon-Package-Board products have been used to design entire chips of a size 4 x 4 and testing as part of PhD students research work. Monte Carlo simulation has been used to study the effects of process variation on chip performance.


Last Reviewed 07/10/2018 by David E. Fortin

“Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.”