Testing, Reliable, and Secure Computing

Website
(617) 353-9592
Location: PHO 302
Associated faculty: Karpovsky, Levitin, Taubin

Members of the Reliable Computing Laboratory conduct research on a broad variety of topics, including the design of computer chips; efficient hardware testing at the chip, board, and system levels; functional software testing; efficient signal processing algorithms; coding and decoding; fault-tolerant message routing for multiprocessor systems; and the design of reliable computer networks. In addition, research is conducted on architectures based on asynchronous circuits for computer security and side-channel attacks resistance.