Alexander Taubin

Alexander TaubinAssociate Professor
PhD, Electrotechnical University of St. Petersburg, 1981

Testing, Reliable, and Secure Computing


(617) 353-1235
webpage
office: PHO 335
office hours: Tuesday, 3:00–5:00 PM

Honors, Awards, and Editorships

  • Senior Member, IEEE

Classes Taught

  • EC311 Introduction to Logic Design
  • EC312 Computer Organization
  • EC500 Special Topics in Electrical and Computer Engineering
  • EC551 Advanced Digital Design with Verilog and FPGA
  • EC700 Advanced Special Topics
  • EC751 Design of Asynchronous Circuit and Systems

Research Interests

  • asynchronous circuit, logic design
  • computer architecture
  • CAD
  • attack-resistant hardware

Selected Publications

  • A. Taubin, J.  Cortadella, L. Lavagno, A. Kondratyev and A. Peeters, ”Design Automation of Real-Life Asynchronous Devices and Systems,” Foundations and Trends in Electronic Design Automation, vol.2, no. 1, pp. 1-133, September, 2007.
  • T. Singh and  A. Taubin, “A Highly Scalable GALS Crossbar Using Token Ring Arbitration,” IEEE Design & Test, vol.24, no. 5, pp.464-472, September-October 2007.
  • K. Kulikowski, V. Venkataraman, Z. Wang and  A. Taubin, “Power Balanced Gates Insensitive to Routing Capacitance Mismatch”, The 11th Design, Automation and Test in Europe, pp. 1280-1286, March 2008. (Best paper award).
  • A. Smirnov and  A. Taubin, “Heuristic Based Throughput Analysis and Optimization of Asynchronous Pipelines”, Proc. 15th IEEE International Symposium on Advanced Research in Asynchronous Circuits and Systems, May 2009.
  • M. Kishinevsky, A. Kondratyev, A. Taubin and V.  Varshavsky, Concurrent Hardware. The Theory and Practice of Self-Timed Design, John Wiley and Sons Ltd., 1994.