ECE Seminar with X. Sharon Hu

Starts:
11:00 am on Thursday, October 31, 2013
Location:
Photonics Center, 8 Saint Mary’s St., Room 339
URL:
http://www.bu.edu/ece/files/2013/10/Hu.pdf
Improving System Reliability Through Temperature-Aware Design

With X. Sharon Hu
Department of Computer Science and Engineering
University of Notre Dame

Faculty Host: Ayse Coskun

Refreshments will be served outside Room 339 at 10:45 a.m.

Abstract: As CMOS technology continues its downward scaling trends, increase in chip power density makes the temperature-induced reliability problem a major design concern. System reliability is a strong function of temperature; a 10 degree difference in operating temperature can result in a 2X difference in the lifespan of a chip. Though chip packaging and cooling solutions can be employed to handle worst-case temperature profiles, such solutions can be prohibitively expensive, since the cost of cooling solutions increases super-linearly in power consumption. Improving system reliability through resource management (including execution throttling and task assignment and scheduling) can provide some powerful alternatives.

This talk discusses two techniques in temperature-aware and reliability-aware design of general-purpose systems. The first technique directly aims at reducing peak temperature. Specifically, an optimal throttling policy is presented for maximizing the work completed under a given peak temperature constraint. The policy is applicable to processors with discrete speed levels and non-negligible transition overheads. Though the throttling policy is effective in controlling peak temperature, it does not directly address the reliability concern. Toward this goal, a number of observations will be given which help describe desirable temperature profiles for increasing system lifetime. An online task assignment and scheduling strategy is then introduced, for directly maximizing system lifetime.

About the Speaker: Xiaobo Sharon Hu is a professor in the department of Computer Science and Engineering at the University of Notre Dame, in Notre Dame, Indiana. She also holds a joint appointment in the department of Electrical Engineering at the same university. Her research interests include low-power system design, real-time embedded systems, computing with emerging devices, and hardware/software codesign. She has published more than 220 papers in these areas and received the Best Paper Award from the ACM/IEEE Design Automation Conference in 2001 and from the IEEE Symposium on Nanoscale Architectures in 2009. Another paper of hers was named one of "The Most Influential Papers of 10 Years Design, Automation, and Test in Europe Conference (DATE)" in 2007. She is the Co-Chair for DAC 2014 and Associate Editor for ACM Transactions on Embedded Computing Systems. She also served as Associate Editor for IEEE Transactions on VLSI and ACM Transactions on Design Automation of Electronic Systems, and as guest editors for several different journals/magazines including the IEEE Computer Magazine. She has received funding support from a number of U.S. federal agencies as well as private industry.