Modeling and management of 3D stacked architectures
3D stacking is an attractive method for designing high-performance chips as it provides
high transistor integration densities, improves manufacturing yield due to smaller chip area, reduces wirelength and capacitance, and enables heterogeneous integration of different technologies on the same chip. Stacking, however, increases the thermal resistivity and the on-chip temperatures.
This project focuses on several key aspects that will enable
cost-efficient design of future high-performance 3D stacks: (1) Thermal modeling and management of 3D systems; (2) Active cooling (e.g., water cooling) modeling and control to improve cooling efficiency; (3) Architecture-level performance evaluation and optimization of various 3D design strategies to understand performance impact on real-life applications.
Software optimization for green computing
This project targets developing inexpensive, widely applicable methods for generating Green Software for reducing the total cost of computing while achieving high performance and reliability. Specific aims are:
(1) Designing mechanisms for creating software variations that are plausibly optimal with respect to performance, energy, and temperature. Some of these are based on existing methods of optimizing for performance such as code transformations and autotuning. Case studies include production applications from document/media processing, scientific computing, and bioinformatics.
(2) Designing consolidation methods to manage resource sharing of software on computing clusters for enabling energy proportional computing. The methods include explicit consideration of the temperature effects and cooling as well as the equipment and energy costs.
Energy and thermal management of manycore systems
Single-chip multicore systems have become increasingly attractive in the recent years because of their potential to provide higher throughput per watt in comparison to single-core systems. It has not been possible, however, to achieve the projected ideal peak performance due to high power densities, prohibitive cooling costs, thermal gradients, suboptimal resource utilization due to dynamically varying workloads, and limited memory bandwidth.
The main objective of this project is to develop a suite of run-time management techniques for manycore systems by jointly exploring key contributors to system performance and power: reconfigurable network architectures, workload scheduling policies, and microarchitectural resource management. We utilize an integrated hardware-software approach to dynamically monitor system behavior and to enforce intelligent decisions for improving performance, energy efficiency and thermal behavior. In addition to simulation and emulation tools, we run experiments on Intel's 48-core Single-Chip Cloud and other commercial servers as part of our research.
NSF CAREER, 2012-2017.
Massachusetts Green High Performance Computing Center, Holyoke, 2012-2013.
Design Automation Conference (DAC) Richard Newton Scholarship, 2011.
Dean's Catalyst Award, College of Engineering, Boston University, 2010.
Sun Microsystems (now Oracle), 2010.